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Document Reference No.: FT_000237
V2DIP2-48 VNC2-48 Development Module Datasheet Version 1.01
Clearance No.: FTDI# 152
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3.5 UART Interface
When the data and control buses are configured in UART mode, the interface implements a standard
asynchronous serial UART port with flow control. The UART can support baud rates from 300baud to
3Mbaud. The UART interface is described more fully in a Vinculum-II datasheet please refer to:- FTDI
3.5.1
Signal Description – UART Interface
The UART signals can be programmed to a choice of I/O pin available. Table 3.4 explains the available
pins for each of the UART signals.
Available Pins
Name
Type
Description
J2-8, J2-4, J1-7,
J2-13
J1-14, J1-19, J2-18,
uart_txd
Output
Transmit asynchronous data output
J2-7, J1-4, J1-8, J1-16, J1-20, J2-17
J2-6, J1-5, J1-10, J1-17, J2-20, J2-16
J2-5, JI-6, J1-11, J1-18, J2-19,
uart_rxd#
uart_rts#
uart_cts#
Input
Output
Input
Receive asynchronous data input
Request To Send Control Output
Clear To Send Control Input
J2-14
J2-8, J2-4, J1-7,
J2-13
J1-14, J1-19, J2-18,
uart_dtr#
Output
Data Acknowledge (Data Terminal
Ready Control) Output
J2-7, J1-4, J1-8, J1-16, J1-20, J2-17
uart_dsr#
Input
Data Request (Data Set Ready
Control) Input
J2-6, J1-5, J1-10, J1-17, J2-20, J2-16
J2-5, JI-6, J1-11, J1-18, J2-19,
J2-14
uart_dcd#
uart_ri#
Input
Input
Data Carrier Detect Control Input
Ring Indicator Control Input.
uart_ri# low can be used to resume
the PC USB Host controller from
suspend.
J2-8, J2-4, J1-7,
J2-13
J1-14, J1-19, J2-18,
uart_tx_active
Output
Enable Transmit Data for RS485
designs. uart_tx_active may be used
to signal that a transmit operation is
in progress.The uart_tx_active signal
will be set high one bit-time before
data is transmitted and return low
one bit time after the last bit of a
data frame has been transmitted
Table 3.4 - Data and Control Bus Signal Mode Options – UART Interface
Copyright ? 2010 Future Technology Devices International Limited
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相关PDF资料
V2DIP2-64
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V5.5MLA020164NR
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VC020116T150WP
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